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![[PDF] Topology of 2 input subnanowatt XOR gate in 65 nm CMOS technology](https://i2.wp.com/d3i71xaburhd42.cloudfront.net/bcc7bfdc662db9ab67516cacb3b7062ea7831033/2-Figure1-1.png)
![The conventional CMOS XOR circuit [12]. | Download Scientific Diagram](https://i2.wp.com/www.researchgate.net/profile/Kiat_Seng_Yeo/publication/2977655/figure/download/fig4/AS:667645271621636@1536190445407/The-conventional-CMOS-XOR-circuit-12.png)
